1. Field of the Invention
The present invention relates to a semiconductor device having wires that vary in wiring pitch, or wires with a so-called pitch variation. More specifically, the invention relates to a semiconductor memory device including a storage element section and a control circuit section (passive circuit) to control the storage element section, which processes wires routed between the storage element section and the control circuit section whose specifications are reduced more than those of the storage element section.
2. Description of the Related Art
In recent years, the formation of wires at a light wavelength (λ) that is the limit of lithography has become essential to semiconductor devices as they increase in density and decrease in size. The following techniques can be adopted to bring a wiring pitch (line/space) close to the limit of lithography in forming wires: the diameter (N) of a lens is increased, an orbicular zone of a lens is used, a translucent mask (half-tone mask) is used, and a phase technology is used. With these techniques, wires can be formed theoretically at the limit of lithography to increase the density of semiconductor devices and decrease the size thereof.
In a peripheral device that controls a semiconductor memory device, especially a peripheral device that is formed simultaneously with a semiconductor memory device, the adoption of the above techniques causes the following phenomenon to appear easily. A wiring short (short circuit) is easy to occur due to a wire whose width is greater than a desired design value and so is a disconnection due to a wire whose width is less than the design value. This phenomenon can be avoided by digitalizing both an optical proximity effect and a wiring processing error in manufacturing a mask and then correcting data of a wiring pattern on the mask (e.g., optical proximity correction, which will be referred to as OPC hereinafter).
In semiconductor memory devices, however, it is very difficult to route wires with pitch variations between a cell of a storage element section and a control circuit section of a decoder, a sense amplifier and the like.
A cell and a control circuit section usually differ in wiring pitch. The reason is as follows. The cell is formed at, e.g., a cell pitch of a processing limit pitch, while the control circuit section is reduced in specifications (design rules) more than the cell and formed at, e.g., a peripheral circuit pitch which is broader than the processing limit pitch. Wires with pitch variations therefore need to be routed between the cell and the control circuit section. In order to increase the density of a semiconductor memory device, the pitch-variation wiring length of wires 101 (the length of oblique leading wires 101a that connect wires 101b toward a cell 103 and wires 101c toward a control circuit section 105) need to be minimized as shown in FIG. 11. The wires 101a should be formed such that their wiring incident angle to the wires 101b is 45 degrees (referred to as 45-degree oblique leading wires hereinafter). This technique has been proposed (see Jpn. Pat. Appln. KOKAI Publication No. 2002-329783, for example).
The above routing of wires 101 with pitch variations between the cell 103 and control circuit section 105 is greatly influenced by an optical proximity effect at the time of lithography. This influence becomes larger especially near the connection nodes of the wires 101b and the 45-degree oblique leading wires 101a. As is apparent from the results 102 of processing simulation shown in FIG. 12, the wires 101b toward the cell 103 are partly widened or narrowed more easily than the wires 101c toward the control circuit section 105. The partial variation in the width of the wires (distortion of the shape of the wires) causes a wiring short or a disconnection in some cases and thus decreases the productivity (yield) of semiconductor memory devices.
Conventionally, a wiring pattern 201 was subjected to OPC to unify the shapes of the wires 101 or the 45-degree oblique leading wires 101a were formed to increase in width more than the wires 101b. However, since an enormous amount of data has to be processed in order to form a wiring pattern in manufacturing a mask, it is difficult to do so completely automatically at the present time. In particular, much effort has to be required to form wires with a wiring incident angle other than those of 45-degree and 90-degree oblique leading wires because of constraints of computer aided drafting (referred to as CAD hereinafter).